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| www..com MC34163, MC33163 3.4 A, Step-Up/Down/ Inverting Switching Regulators The MC34163 series are monolithic power switching regulators that contain the primary functions required for dc-to-dc converters. This series is specifically designed to be incorporated in step-up, step-down, and voltage-inverting applications with a minimum number of external components. These devices consist of two high gain voltage feedback comparators, temperature compensated reference, controlled duty cycle oscillator, driver with bootstrap capability for increased efficiency, and a high current output switch. Protective features consist of cycle-by-cycle current limiting, and internal thermal shutdown. Also included is a low voltage indicator output designed to interface with microprocessor based systems. These devices are contained in a 16 pin dual-in-line heat tab plastic package for improved thermal conduction. Features http://onsemi.com MARKING DIAGRAMS 16 16 1 1 PDIP-16 P SUFFIX CASE 648C 16 16 1 SOIC-16W DW SUFFIX CASE 751G x A WL YY WW G MC3x163DW AWLYYWWG 1 MC3x163P AWLYYWWG * * * * * * * * * * * * Output Switch Current in Excess of 3.0 A Operation from 2.5 V to 40 V Input Low Standby Current Precision 2% Reference Controlled Duty Cycle Oscillator Driver with Bootstrap Capability for Increased Efficiency Cycle-by-Cycle Current Limiting Internal Thermal Shutdown Protection Low Voltage Indicator Output for Direct Microprocessor Interface Heat Tab Power Package Moisture Sensitivity Level (MSL) Equals 1 Pb-Free Packages are Available* Ipk Sense 8 - + = 3 or 4 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package ILimit 9 Driver Collector PIN CONNECTIONS LVI Output 1 2 3 4 16 Bootstrap Input 15 14 13 GND 5 12 11 10 Switch Collector 6 7 8 (Top View) Switch Emitter VCC Timing Capacitor 7 + 10 Switch Collector 11 Voltage Feedback 2 Voltage Feedback 1 GND 6 OSC 5 GND 4 Voltage Feedback 1 Voltage Feedback 2 LVI Output 3 Control Logic and Thermal Shutdown + 12 GND 13 14 Timing Capacitor VCC Ipk Sense 9 Driver Collector 2 LVI 1 + + - + + - VFB 15 Switch Emitter ORDERING INFORMATION 16 + Bootstrap Input See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (Bottom View) This device contains 114 active transistors. Figure 1. Representative Block Diagram (c) Semiconductor Components Industries, LLC, 2005 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 1 Publication Order Number: MC34163/D October, 2005 - Rev. 5 MC34163, MC33163 MAXIMUM RATINGS (Note 1) Rating Power Supply Voltage Switch Collector Voltage Range Switch Emitter Voltage Range Switch Collector to Emitter Voltage Switch Current (Note 2) Driver Collector Voltage Driver Collector Current Bootstrap Input Current Range (Note 2) Current Sense Input Voltage Range Feedback and Timing Capacitor Input Voltage Range Low Voltage Indicator Output Voltage Range Low Voltage Indicator Output Sink Current Thermal Characteristics P Suffix, Dual-In-Line Case 648C Thermal Resistance, Junction-to-Air Thermal Resistance, Junction-to-Case (Pins 4, 5, 12, 13) DW Suffix, Surface Mount Case 751G Thermal Resistance, Junction-to-Air Thermal Resistance, Junction-to-Case (Pins 4, 5, 12, 13) Operating Junction Temperature Operating Ambient Temperature (Note 3) MC34163 MC33163 Storage Temperature Range Symbol VCC VC(switch) VE(switch) VCE(switch) ISW VC(driver) IC(driver) IBS VIpk (Sense) Vin VC(LVI) IC(LVI) Value 40 -1.0 to + 40 - 2.0 to VC(switch) 40 3.4 -1.0 to +40 150 -100 to +100 (VCC-7.0) to (VCC+1.0) -1.0 to + 7.0 -1.0 to + 40 10 Unit V V V V A V mA mA V V V mA C/W RqJA RqJC RqJA RqJC TJ TA 0 to +70 - 40 to + 85 Tstg - 65 to +150 C 80 15 94 18 +150 C C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 1500 V per MIL-STD-883, Method 3015. Machine Model Method 150 V. 2. Maximum package power dissipation limits must be observed. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. ORDERING INFORMATION Device MC33163DW MC33163DWG MC33163DWR2 MC33163DWR2G MC33163P MC33163PG MC34163DW MC34163DWG MC34163DWR2 MC34163DWR2G MC34163P MC34163PG Package SOIC-16W SOIC-16W (Pb-Free) SOIC-16W SOIC-16W (Pb-Free) PDIP-16 PDIP-16 (Pb-Free) SOIC-16W SOIC-16W (Pb-Free) SOIC-16W SOIC-16W (Pb-Free) PDIP-16 PDIP-16 (Pb-Free) Shipping 47 Units / Rail 47 Units / Rail 1000 Units / Reel 1000 Units / Reel 25 Units / Rail 25 Units / Rail 47 Units / Rail 47 Units / Rail 1000 Units / Reel 1000 Units / Reel 25 Units / Rail 25 Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 MC34163, MC33163 ELECTRICAL CHARACTERISTICS (VCC = 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25C, for min/max values TA is the operating ambient temperature range that applies (Note 5), unless otherwise noted.) Characteristic OSCILLATOR Frequency TA = 25C Total Variation over VCC = 2.5 V to 40 V, and Temperature Charge Current Discharge Current Charge to Discharge Current Ratio Sawtooth Peak Voltage Sawtooth Valley Voltage FEEDBACK COMPARATOR 1 Threshold Voltage TA = 25C Line Regulation (VCC = 2.5 V to 40 V, TA = 25C) Total Variation over Line, and Temperature Input Bias Current (VFB1 = 5.05 V) FEEDBACK COMPARATOR 2 Threshold Voltage TA = 25C Line Regulation (VCC = 2.5 V to 40 V, TA = 25C) Total Variation over Line, and Temperature Input Bias Current (VFB2 = 1.25 V) CURRENT LIMIT COMPARATOR Threshold Voltage TA = 25C Total Variation over VCC = 2.5 V to 40 V, and Temperature Input Bias Current (VIpk (Sense) = 15 V) DRIVER AND OUTPUT SWITCH (Note 4) Sink Saturation Voltage (ISW = 2.5 A, Pins 14, 15 grounded) Non-Darlington Connection (RPin 9 = 110 W to VCC, ISW/IDRV 20) Darlington Connection (Pins 9, 10, 11 connected) Collector Off-State Leakage Current (VCE = 40 V) Bootstrap Input Current Source (VBS = VCC + 5.0 V) Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) LOW VOLTAGE INDICATOR Input Threshold (VFB2 Increasing) Input Hysteresis (VFB2 Decreasing) Output Sink Saturation Voltage (Isink = 2.0 mA) Output Off-State Leakage Current (VOH = 15 V) TOTAL DEVICE Standby Supply Current (VCC = 2.5 V to 40 V, Pin 8 = VCC, Pins 6, 14, 15 = GND, remaining pins open) ICC - 6.0 10 mA Vth VH VOL(LVI) IOH 1.07 - - - 1.125 15 0.15 0.01 1.18 - 0.4 5.0 V mV V mA VCE(sat) - - IC(off) Isource(DRV) VZ - 0.5 VCC + 6.0 0.6 1.0 0.02 2.0 VCC + 7.0 1.0 1.4 100 4.0 VCC + 9.0 mA mA V V Vth(Ipk Sense) - 230 IIB(sense) - 250 - 1.0 - 270 20 mA mV Vth(FB2) 1.225 - 1.213 IIB(FB2) - 0.4 1.25 0.008 - 0 1.275 0.03 1.287 0.4 V %/V V mA Vth(FB1) 4.9 - 4.85 IIB(FB1) - 5.05 0.008 - 100 5.2 0.03 5.25 200 V %/V V mA fOSC 46 45 Ichg Idischg Ichg/Idischg VOSC(P) VOSC(V) - - 8.0 - - 50 - 225 25 9.0 1.25 0.55 54 55 - - 10 - - mA mA - V V kHz Symbol Min Typ Max Unit 4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 5. Tlow = 0C for MC34163 Thigh = + 70C for MC34163 = - 40C for MC33163 = + 85C for MC33163 http://onsemi.com 3 MC34163, MC33163 t on -t off , OUTPUT SWITCH ON-OFF TIME ( s) 100 f OSC, OSCILLATOR FREQUENCY CHANGE (%) VCC = 15 V TA = 25C 1) ton, RDT = 2) ton, RDT = 20 k 3) ton, toff, RDT = 10 k 4) toff, RDT = 20 k 5) toff, RDT = 2.0 VCC = 15 V CT = 620 pF 0 1 2 3 4 5 10 - 2.0 - 4.0 1.0 0.1 1.0 CT, OSCILLATOR TIMING CAPACITOR (nF) 10 - 6.0 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 Figure 2. Output Switch On-Off Time versus Oscillator Timing Capacitor Figure 3. Oscillator Frequency Change versus Temperature 140 IIB , INPUT BIAS CURRENT ( A) VCC = 15 V VFB1 = 5.05 V 120 V th(FB2), COMPARATOR 2 THRESHOLD VOLTAGE (mV 1300 1280 1260 1240 Vth Min = 1225 mV 1220 1200 - 55 VCC = 15 V Vth Max = 1275 mV Vth Typ = 1250 mV 100 80 60 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 Figure 4. Feedback Comparator 1 Input Bias Current versus Temperature I source (DRV), BOOTSTRAP INPUT CURRENT SOURCE (mA) Figure 5. Feedback Comparator 2 Threshold Voltage versus Temperature V Z, BOOTSTRAP INPUT ZENER CLAMP VOLTAGE (V) 2.8 VCC = 15 V Pin 16 = VCC + 5.0 V 2.4 7.6 IZ = 25 mA 7.4 2.0 7.2 1.6 7.0 1.2 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 6.8 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 Figure 6. Bootstrap Input Current Source versus Temperature Figure 7. Bootstrap Input Zener Clamp Voltage versus Temperature http://onsemi.com 4 MC34163, MC33163 0 VCE (sat), SOURCE SATURATION (V) VCE (sat), SINK SATURATION (V) VCC - 0.4 - 0.8 -1.2 -1.6 - 2.0 Darlington Configuration Emitter Sourcing Current to GND Pins 7, 8, 10, 11 = VCC Pins 4, 5, 12, 13 = GND TA = 25C, (Note 2) 1.2 1.0 0.8 0.6 0.4 0.2 0 Grounded Emitter Configuration Collector Sinking Current From VCC Pins 7, 8 = VCC = 15 V Pins 4, 5, 12, 13, 14, 15 = GND TA = 25C, (Note 2) Saturated Switch, RPin9 = 110 W to VCC GND 0 0.8 1.6 2.4 IC, COLLECTOR CURRENT (A) 3.2 Darlington, Pins 9, 10, 11 Connected Bootstrapped, Pin 16 = VCC + 5.0 V Non-Bootstrapped, Pin 16 = VCC 0 0.8 2.4 1.6 IE, EMITTER CURRENT (A) 3.2 Figure 8. Output Switch Source Saturation versus Emitter Current Figure 9. Output Switch Sink Saturation versus Collector Current GND V E , EMITTER VOLTAGE (V) - 0.4 - 0.8 - 1.2 - 1.6 - 2.0 - 55 V OL (LVI) , OUTPUT SATURATION VOLTAGE (V) 0 IC = 10 mA 0.5 0.4 0.3 0.2 0.1 0 VCC = 5 V TA = 25C IC = 10 mA VCC = 15 V Pins 7, 8, 9, 10, 16 = VCC Pins 4, 6 = GND Pin 14 Driven Negative - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 0 2.0 4.0 6.0 Isink, OUTPUT SINK CURRENT (mA) 8.0 Figure 10. Output Switch Negative Emitter Voltage versus Temperature Figure 11. Low Voltage Indicator Output Sink Saturation Voltage versus Sink Current V th (Ipk Sense), THRESHOLD VOLTAGE (mV) IIB (Sense), INPUT BIAS CURRENT ( A) 254 VCC = 15 V 1.6 1.4 1.2 1.0 0.8 0.6 - 55 VCC = 15 V VIpk (Sense) = 15 V 252 250 248 246 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 Figure 12. Current Limit Comparator Threshold Voltage versus Temperature Figure 13. Current Limit Comparator Input Bias Current versus Temperature http://onsemi.com 5 MC34163, MC33163 8.0 I CC, SUPPLY CURRENT (mA) I CC, SUPPLY CURRENT (mA) 7.2 VCC = 15 V Pins 7, 8, 16 = VCC Pins 4, 6, 14 = GND Remaining Pins Open 6.0 6.4 4.0 Pins 7, 8, 16 = VCC Pins 4, 6, 14 = GND Remaining Pins Open TA = 25C 0 10 20 30 VCC, SUPPLY VOLTAGE (V) 40 5.6 2.0 4.8 0 4.0 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 Figure 14. Standby Supply Current versus Supply Voltage V CC(min) , MINIMUM OPERATING SUPPLY VOLTAGE (V) Figure 15. Standby Supply Current versus Temperature R JA, THERMAL RESISTANCE JUNCTION-TO-AIR ( C/W) 2.6 2.2 1.8 1.4 1.0 - 55 Pin 16 Open 80 60 40 20 PD(max) for TA = 70C RqJA L L 3.0 mm Graphs represent symmetrical layout Pin 16 = VCC - 25 0 25 50 75 100 125 0 0 10 20 TA, AMBIENT TEMPERATURE (C) L, LENGTH OF COPPER (mm) Figure 16. Minimum Operating Supply Voltage versus Temperature Figure 17. P Suffix (DIP-16) Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length R JA, THERMAL RESISTANCE 90 80 70 PD(max) for TA = 50C 2.4 2.0 1.6 1.2 0.8 0.4 0 50 Graph represents symmetrical layout L 60 50 40 30 0 10 20 RqJA 2.0 oz. Copper L 3.0 mm 30 40 L, LENGTH OF COPPER (mm) Figure 18. DW Suffix (SOP-16L) Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length http://onsemi.com 6 PD, MAXIMUM POWER DISSIPATION (W) 100 2.8 JUNCTION-TO-AIR ( C/W) IIIII IIIII IIIII 2.0 oz Copper CT = 620 pF Pins 7,8 = VCC Pins 4, 14 = GND Pin 9 = 1.0 kW to 15 V Pin 10 = 100 W to 15 V Printed circuit board heatsink example 4.0 3.0 2.0 1.0 0 30 40 50 P D , MAXIMUM POWER DISSIPATION (W) 3.0 100 5.0 II III II III II IIIIII MC34163, MC33163 0.25 V + Current Limit Ipk Sense RSC VCC Timing Capacitor Shutdown CT RDT GND 8 7 6 5 - + 9 10 Driver Collector + Switch Collector Oscillator R Q S Latch + Q1 Q2 60 11 12 GND 13 14 Thermal 4 Voltage Feedback 1 Voltage Feedback 2 LVI Output 3 45 k 2 1 LVI + + - + + - Switch Emitter Feedback Comparator 2.0 mA + + 15 16 Bootstrap Input + - 1.25 V 15 k + 1.125 V (Bottom View) 7.0 V = Sink Only Positive True Logic Figure 19. Representative Block Diagram 1 Comparator Output 0 1.25 V Timing Capacitor CT 0.55 V 1 Oscillator Output 0 On Output Switch Off Nominal Output Voltage Level t 9t Output Voltage Startup Quiescent Operation Figure 20. Typical Operating Waveforms http://onsemi.com 7 MC34163, MC33163 INTRODUCTION The MC34163 series are monolithic power switching regulators optimized for dc-to-dc converter applications. The combination of features in this series enables the system designer to directly implement step-up, step-down, and voltage-inverting converters with a minimum number of external components. Potential applications include cost sensitive consumer products as well as equipment for the automotive, computer, and industrial markets. A Representative Block Diagram is shown in Figure 19. OPERATING DESCRIPTION The MC34163 operates as a fixed on-time, variable off-time voltage mode ripple regulator. In general, this mode of operation is somewhat analogous to a capacitor charge pump and does not require dominant pole loop compensation for converter stability. The Typical Operating Waveforms are shown in Figure 20. The output voltage waveform shown is for a step-down converter with the ripple and phasing exaggerated for clarity. During initial converter startup, the feedback comparator senses that the output voltage level is below nominal. This causes the output switch to turn on and off at a frequency and duty cycle controlled by the oscillator, thus pumping up the output filter capacitor. When the output voltage level reaches nominal, the feedback comparator sets the latch, immediately terminating switch conduction. The feedback comparator will inhibit the switch until the load current causes the output voltage to fall below nominal. Under these conditions, output switch conduction can be inhibited for a partial oscillator cycle, a partial cycle plus a complete cycle, multiple cycles, or a partial cycle plus multiple cycles. Oscillator resistor increases the discharge current which reduces the on-time of the output switch. A graph of the Output Switch On-Off Time versus Oscillator Timing Capacitance for various values of RDT is shown in Figure 2. Note that the maximum output duty cycle, ton/ton + toff, remains constant for values of CT greater than 0.2 nF. The converter output can be inhibited by clamping CT to ground with an external NPN small-signal transistor. Feedback and Low Voltage Indicator Comparators The oscillator frequency and on-time of the output switch are programmed by the value selected for timing capacitor CT. Capacitor CT is charged and discharged by a 9 to 1 ratio internal current source and sink, generating a negative going sawtooth waveform at Pin 6. As CT charges, an internal pulse is generated at the oscillator output. This pulse is connected to the NOR gate center input, preventing output switch conduction, and to the AND gate upper input, allowing the latch to be reset if the comparator output is low. Thus, the output switch is always disabled during ramp-up and can be enabled by the comparator output only at the start of ramp-down. The oscillator peak and valley thresholds are 1.25 V and 0.55 V, respectively, with a charge current of 225 mA and a discharge current of 25 mA, yielding a maximum on-time duty cycle of 90%. A reduction of the maximum duty cycle may be required for specific converter configurations. This can be accomplished with the addition of an external deadtime resistor (RDT) placed across CT. The Output voltage control is established by the Feedback comparator. The inverting input is internally biased at 1.25 V and is not pinned out. The converter output voltage is typically divided down with two external resistors and monitored by the high impedance noninverting input at Pin 2. The maximum input bias current is 0.4 mA, which can cause an output voltage error that is equal to the product of the input bias current and the upper divider resistance value. For applications that require 5.0 V, the converter output can be directly connected to the noninverting input at Pin 3. The high impedance input, Pin 2, must be grounded to prevent noise pickup. The internal resistor divider is set for a nominal voltage of 5.05 V. The additional 50 mV compensates for a 1.0% voltage drop in the cable and connector from the converter output to the load. The Feedback comparator's output state is controlled by the highest voltage applied to either of the two noninverting inputs. The Low Voltage Indicator (LVI) comparator is designed for use as a reset controller in microprocessor-based systems. The inverting input is internally biased at 1.125 V, which sets the noninverting input thresholds to 90% of nominal. The LVI comparator has 15 mV of hysteresis to prevent erratic reset operation. The Open Collector output is capable of sinking in excess of 6.0 mA (see Figure 11). An external resistor (RLVI) and capacitor (CDLY) can be used to program a reset delay time (tDLY) by the formula shown below, where Vth(MPU) is the microprocessor reset input threshold. Refer to Figure 21. 1 Vth(MPU) 1- Vout tDLY = RLVI CDLY In Current Limit Comparator, Latch and Thermal Shutdown With a voltage mode ripple converter operating under normal conditions, output switch conduction is initiated by the oscillator and terminated by the Voltage Feedback comparator. Abnormal operating conditions occur when the converter output is overloaded or when feedback voltage sensing is lost. Under these conditions, the Current Limit comparator will protect the Output Switch. http://onsemi.com 8 MC34163, MC33163 The switch current is converted to a voltage by inserting a fractional ohm resistor, RSC, in series with VCC and output switch transistor Q2. The voltage drop across RSC is monitored by the Current Sense comparator. If the voltage drop exceeds 250 mV with respect to VCC, the comparator will set the latch and terminate output switch conduction on a cycle-by-cycle basis. This Comparator/Latch configuration ensures that the Output Switch has only a single on-time during a given oscillator cycle. The calculation for a value of RSC is: RSC + 0.25 V Ipk (Switch) Figures 12 and 13 show that the Current Sense comparator threshold is tightly controlled over temperature and has a typical input bias current of 1.0 mA. The propagation delay from the comparator input to the Output Switch is typically 200 ns. The parasitic inductance associated with RSC and the circuit layout should be minimized. This will prevent unwanted voltage spikes that may falsely trip the Current Limit comparator. Internal thermal shutdown circuitry is provided to protect the IC in the event that the maximum junction temperature is exceeded. When activated, typically at 170C, the Latch is forced into the "Set" state, disabling the Output Switch. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended to be used as a replacement for proper heatsinking. Driver and Output Switch additional device heating and reduced conversion efficiency. Figure 10 shows that by clamping the emitter to 0.5 V, the collector current will be in the range 10 mA over temperature. A 1N5822 or equivalent Schottky barrier rectifier is recommended to fulfill these requirements. A bootstrap input is provided to reduce the output switch saturation voltage in step-down and voltage-inverting converter applications. This input is connected through a series resistor and capacitor to the switch emitter and is used to raise the internal 2.0 mA bias current source above VCC. An internal zener limits the bootstrap input voltage to VCC +7.0 V. The capacitor's equivalent series resistance must limit the zener current to less than 100 mA. An additional series resistor may be required when using tantalum or other low ESR capacitors. The equation below is used to calculate a minimum value bootstrap capacitor based on a minimum zener voltage and an upper limit current source. CB(min) + I Dt + 4.0 mA ton + 0.001 ton DV 4.0 V Parametric operation of the MC34163 is guaranteed over a supply voltage range of 2.5 V to 40 V. When operating below 3.0 V, the Bootstrap Input should be connected to VCC. Figure 16 shows that functional operation down to 1.7 V at room temperature is possible. Package To aid in system design flexibility and conversion efficiency, the driver current source and collector, and output switch collector and emitter are pinned out separately. This allows the designer the option of driving the output switch into saturation with a selected force gain or driving it near saturation when connected as a Darlington. The output switch has a typical current gain of 70 at 2.5 A and is designed to switch a maximum of 40 V collector to emitter, with up to 3.4 A peak collector current. The minimum value for RSC is: RSC(min) + 0.25 V + 0.0735 W 3.4 A The MC34163 is contained in a heatsinkable 16-lead plastic dual-in-line package in which the die is mounted on a special heat tab copper alloy lead frame. This tab consists of the four center ground pins that are specifically designed to improve thermal conduction from the die to the circuit board. Figures 17 and 18 show a simple and effective method of utilizing the printed circuit board medium as a heat dissipater by soldering these pins to an adequate area of copper foil. This permits the use of standard layout and mounting practices while having the ability to halve the junction-to-air thermal resistance. These examples are for a symmetrical layout on a single-sided board with two ounce per square foot of copper. APPLICATIONS The following converter applications show the simplicity and flexibility of this circuit architecture. Three main converter topologies are demonstrated with actual test data shown below each of the circuit diagrams. When configured for step-down or voltage-inverting applications, as in Figures 21 and 25, the inductor will forward bias the output rectifier when the switch turns off. Rectifiers with a high forward voltage drop or long turn-on delay time should not be used. If the emitter is allowed to go sufficiently negative, collector current will flow, causing http://onsemi.com 9 MC34163, MC33163 0.25 V + Current Limit 8 RSC Vin 12 V 0.075 - + 9 10 Cin 330 CT 680 pF + 7 + 6 5 Oscillator R Q S Latch + Q1 Q2 11 12 Thermal 4 3 45 k 2 Low Voltage Indicator Output RLVI 10 k CDLY 1 LVI + + - + + - 60 13 14 + Feedback Comparator 2.0 mA 15 16 1N5822 0.02 CB RB 2200 180 mH Coilcraft LO451-A Vout + 5.05 V/3.0 A CO 1.25 V 15 k + 1.125 V (Bottom View) + 7.0 V L Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency, Without Bootstrap Efficiency, With Bootstrap Condition Vin = 8.0 V to 24 V, IO = 3.0 A Vin = 12 V, IO = 0.6 A to 3.0 A Vin = 12 V, IO = 3.0 A Vin = 12 V, RL = 0.1 W Vin = 12 V, IO = 3.0 A Vin = 12 V, IO = 3.0 A Results 6.0 mV = 0.06% 2.0 mV = 0.02% 36 mVpp 3.3 A 76.7% 81.2% Figure 21. Step-Down Converter 8 7 6 5 4 3 2 1 + 9 10 + 8 7 + 9 10 Q1 Q2 11 12 13 14 15 16 + Q3 Q1 Q2 11 12 13 14 15 16 Q3 6 5 4 3 2 1 (Bottom View) + + (Bottom View) Figure 22A. External NPN Switch Figure 22B. External PNP Saturated Switch Figure 22. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A http://onsemi.com 10 MC34163, MC33163 0.25 V + Current Limit L 9 10 + 8 RSC Vin 12 V 0.075 - + 180 mH Coilcraft LO451-A Cin 330 + 7 6 5 Thermal 4 3 45 k 2 + + + - + + - + CT 680 pF Oscillator R Q S Latch Q1 Q2 60 11 12 13 1N5822 14 Feedback Comparator 2.0 mA 7.0 V 15 16 Low Voltage Indicator Output 1 RLVI 1.0 k R2 47 k LVI 1.25 V 15 k + 1.125 V (Bottom View) + R1 2.2 k +C O 330 Vout 28 V/600 mA Test Line Regulation Load Regulation Output Ripple Efficiency Condition Vin = 9.0 V to 16 V, IO = 0.6 A Vin = 12 V, IO = 0.1 A to 0.6 A Vin = 12 V, IO = 0.6 A Vin = 12 V, IO = 0.6 A Results 30 mV = 0.05% 50 mV = 0.09% 140 mVpp 88.1% Figure 23. Step-Up Converter 8 7 6 5 4 3 2 1 + + 9 10 Q1 Q2 11 12 13 14 15 16 (Bottom View) Q3 8 7 6 5 4 3 2 1 + 9 10 + + Q1 Q2 11 12 13 14 15 16 Q3 + (Bottom View) Figure 24A. External NPN Switch Figure 24B. External PNP Saturated Switch Figure 24. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A http://onsemi.com 11 MC34163, MC33163 0.25 V + Current Limit 8 RSC Vin 12 V CT 470 pF 0.075 - + 9 10 Cin 330 + 7 + 6 5 Thermal 4 + 3 45 k 2 1 LVI + + - + + - Oscillator R Q S Latch Q1 Q2 60 11 12 13 Coilcraft LO451-A 14 L 180 mH RB CB 1N5822 2200 + CO Vout - 12 V/1.0 A + Feedback Comparator 2.0 mA + 15 0.02 16 7.0 V 1.25 V 15 k + 1.125 V (Bottom View) R2 8.2 k R1 953 Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency, Without Bootstrap Efficiency, With Bootstrap Condition Vin = 9.0 V to 16 V, IO = 1.0 A Vin = 12 V, IO = 0.6 A to 1.0 A Vin = 12 V, IO = 1.0 A Vin = 12 V, RL = 0.1 W Vin = 12 V, IO = 1.0 A Vin = 12 V, IO = 1.0 A Results 5.0 mV = 0.02% 2.0 mV = 0.01% 130 mVpp 3.2 A 73.1% 77.5% Figure 25. Voltage-Inverting Converter 8 7 6 5 4 3 2 1 + 9 10 Q1 Q2 11 12 13 14 15 16 Q3 8 7 6 5 4 3 2 1 + 9 10 + Q3 + Q1 Q2 11 12 13 14 15 16 + + (Bottom View) (Bottom View) Figure 26A. External NPN Switch Figure 26B. External PNP Saturated Switch Figure 26. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A http://onsemi.com 12 MC34163, MC33163 + + + + + VO - R LVI CO MC34163 Step-Down + - CB V in R2 + RB C in R1 + + + CT + R SC L + Bottom View Top View + + + + + MC34163 Step-Up R LVI VO - CO + V in - R2 + R1 C in CT + + + + R SC L + Bottom View Top View + + + MC34163 Voltage-Inverting + VO + - CO R1 - CB + V in R2 C in RB + + + + CT + R SC L + Bottom View All printed circuit boards are 2.58" in width by 1.9" in height. Top View Figure 27. Printed Circuit Board and Component Layout (Circuits of Figures 21, 23, 25) http://onsemi.com 13 MC34163, MC33163 Calculation ton t 1, (Notesoff 2, 3) Step-Down V out ) V F * V sat * V out in t on t off ton t on )1 t off 32.143 * 10-6 Iout IL(avg) ) DI L 2 Step-Up V out ) V F - V in V - V sat in t on t off t on )1 t off Voltage-Inverting |V out| ) V F V * V sat in t on t off t on )1 t off V CT IL(avg) Ipk (Switch) RSC V L in 32.143 * 10-6 I out t on )1 t off DI L 2 32.143 * 10-6 I out t on )1 t off DI L 2 IL(avg) ) IL(avg) ) 0.25 Ipk (Switch) * V sat * V out DI L 1 8O C V 2 ) (ESR)2 R2 ref R1 V t on 0.25 Ipk (Switch) in * V sat DI L t on I out C R2 ref R1 O )1 V V t on 0.25 Ipk (Switch) in * V sat DI L t on I out C R2 ref R1 O )1 t on Vripple(pp) DIL [ [ Vout )1 V The following Converter Characteristics must be chosen: Nominal operating input voltage. Desired output voltage. Desired output current. Desired peak-to-peak inductor ripple current. For maximum output current it is suggested that DIL be chosen to be less than 10% of the average inductor current IL(avg). This will help prevent Ipk (Switch) from reaching the current limit threshold set by RSC. If the design goal is to use a minimum inductance value, let DIL = 2(IL(avg)). This will proportionally reduce converter output current capability. p - Maximum output switch frequency. Vripple(pp) - Desired peak-to-peak output ripple voltage. For best performance the ripple voltage should be kept to a low value since it will directly affect line and load regulation. Capacitor CO should be a low equivalent series resistance (ESR) electrolytic designed for switching regulator applications. NOTES: NOTES: NOTES: NOTES: 1. 2. 3. 3. Vsat - Saturation voltage of the output switch, refer to Figures 8 and 9. VF - Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V. The calculated ton/toff must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimum operating input voltage. Vin - Vout - Iout - DIL - Figure 28. Design Equations http://onsemi.com 14 MC34163, MC33163 PACKAGE DIMENSIONS PDIP-16 P SUFFIX CASE 648C-04 ISSUE D A A 16 9 J 0.005 (0.13) 16X B L M TB B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. INCHES MIN MAX 0.744 0.783 0.240 0.260 0.145 0.185 0.015 0.021 0.050 BSC 0.040 0.70 0.100 BSC 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.040 MILLIMETERS MIN MAX 18.90 19.90 6.10 6.60 3.69 4.69 0.38 0.53 1.27 BSC 1.02 1.78 2.54 BSC 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 1 8 F DIM A B C D E F G J K L M N N K C E G 16X T D M SEATING PLANE 0.005 (0.13) TA SOIC-16W DW SUFFIX CASE 751G-03 ISSUE C D 16 M 9 A q h X 45_ 0.25 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS DIM MIN MAX A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 q 0_ 7_ H M B 8X 1 8 16X B TA S 0.25 M B S A E B A1 14X e SEATING PLANE T C http://onsemi.com 15 L MC34163, MC33163 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 16 MC34163/D |
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